Digital circuits can be divided into two broad categories: combinational circuits and sequential circuits.

Combinational circuits such as adders, multiplexers and decoders produce outputs based primarily on their present inputs. Sequential circuits are different: they have memory. Their behavior depends not only on the current inputs but also on the circuit’s previous state.

This ability to remember previous conditions is what allows digital systems to perform tasks such as:

• following a sequence of operations,
• controlling processors,
• detecting patterns,
• generating timing sequences,
• managing communication protocols,
• controlling machines and embedded systems.

A sequential circuit can be viewed as a system that repeatedly performs three fundamental operations:$$\boxed{\text{Read Inputs}\rightarrow\text{Determine Next State}\rightarrow\text{Store State}}$$

In this article, we will learn how sequential circuits are designed systematically using state variables, state tables, state diagrams, next-state equations, output equations, flip-flops, state assignment, and state reduction.

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1. What Is a Sequential Circuit?

A sequential circuit is a digital circuit whose output depends on:

1. the present input, and
2. the present state stored in memory.

Mathematically:$$\boxed{Q_{next}=F(Q,X)}$$

and:$$\boxed{Y=G(Q,X)}$$

where:

• $Q$ = present state
• $Q_{next}$ = next state
• $X$ = input
• $Y$ = output

The stored state is generally implemented using flip-flops.

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2. Combinational vs Sequential Circuits

Understanding this difference is essential.

Feature	Combinational Circuit	Sequential Circuit
Memory	No	Yes
Depends on previous state	No	Yes
Main elements	Logic gates	Logic gates + flip-flops
Clock	Usually not required	Commonly used
Examples	Adder, MUX, Decoder	Counter, Register, FSM

For a combinational circuit:$$\boxed{Y=F(X)}$$

For a sequential circuit:$$\boxed{Y=F(X,Q)}$$

That additional state variable $Q$ is what gives the sequential circuit memory.

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3. Basic Structure of a Synchronous Sequential Circuit

A typical synchronous sequential circuit contains three major components:

                 ┌────────────────────┐
Inputs ─────────►│  Next-State Logic  │──────┐
                 └────────────────────┘      │
                           ▲                  ▼
                           │             ┌─────────┐
                           │             │ Flip-   │
                           └─────────────│ Flops   │
                                         └────┬────┘
                                              │
                                              ▼
                                         Present State
                                              │
                                              └──────────► Output Logic

The basic operation is:$$\boxed{ \text{Inputs + Present State} \rightarrow \text{Next-State Logic} \rightarrow \text{Flip-Flops} \rightarrow \text{Next State} }$$

The clock determines when the new state is stored.

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4. What Is a State?

A state represents the information currently stored in the sequential circuit.

Suppose a system has two state bits:$$Q_1Q_0$$

There are:$$2^2=4$$

possible states:$$00,\quad01,\quad10,\quad11$$

For three state bits:$$2^3=8$$

possible states exist.

Therefore, with $n$ flip-flops:$$\boxed{N_{states}=2^n}$$

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5. Present State and Next State

Two terms appear constantly in sequential-circuit design.

Present State

The state currently stored in the flip-flops.

It is commonly written as:$$Q$$

Next State

The state that will be stored after the next active clock edge.

It is commonly written as:$$Q_{next}$$

Therefore:$$\boxed{Q\rightarrow Q_{next}}$$

represents a state transition.

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6. State Transition

A sequential circuit continuously moves from one state to another.

For example:$$00\rightarrow01$$$$01\rightarrow10$$$$10\rightarrow11$$$$11\rightarrow00$$

This sequence could represent a simple modulo-4 counter.

The important point is that the circuit’s behavior can be described entirely in terms of state transitions.

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7. What Is a State Table?

A state table provides a tabular representation of the behavior of a sequential circuit.

A typical state table contains:

• Present state
• Input
• Next state
• Output

A generic format is:

Present State	Input	Next State	Output
$Q$	$X$	$Q_{next}$	$Y$

For a circuit with multiple state bits:

$Q_1Q_0$	X	$Q_1^+Q_0^+$	Y

where $Q^+$ means the next state.

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8. Example of a State Table

Consider a system with two state bits and no external input.

Suppose its sequence is:$$00\rightarrow01\rightarrow10\rightarrow11\rightarrow00$$

The state table is:

Present State	Next State
00	01
01	10
10	11
11	00

This table completely describes the required state sequence.

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9. What Is a State Diagram?

A state diagram represents the same information graphically.

Each state is represented by a circle, while an arrow represents a transition.

Conceptually:

      ┌─────┐
      │ 00  │
      └──┬──┘
         │
         ▼
      ┌─────┐
      │ 01  │
      └──┬──┘
         │
         ▼
      ┌─────┐
      │ 10  │
      └──┬──┘
         │
         ▼
      ┌─────┐
      │ 11  │
      └──┬──┘
         │
         └────────► 00

The state diagram is particularly useful because it allows the designer to visualize the behavior of the system before implementing the logic.

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10. State Diagram vs State Table

These are two different representations of the same sequential behavior.

State Diagram	State Table
Graphical	Tabular
States shown as circles	States shown as rows
Transitions shown as arrows	Transitions shown as next-state entries
Easy to visualize	Easy to derive equations

A professional sequential-circuit design often moves through:$$\boxed{ \text{Specification} \rightarrow \text{State Diagram} \rightarrow \text{State Table} \rightarrow \text{Logic Equations} \rightarrow \text{Circuit} }$$

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11. State Equations

Once the state table is known, Boolean equations can be derived for each next-state variable.

Suppose a circuit has:$$Q_1,\ Q_0$$

Then we need two next-state equations:$$\boxed{Q_1^+=F_1(Q_1,Q_0,X)}$$

and:$$\boxed{Q_0^+=F_0(Q_1,Q_0,X)}$$

These equations determine what values must be loaded into the flip-flops at the next clock edge.

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12. Example: Deriving a Next-State Equation

Suppose a state sequence is:$$00\rightarrow01$$$$01\rightarrow10$$$$10\rightarrow11$$$$11\rightarrow00$$

The least significant bit follows:$$0\rightarrow1$$$$1\rightarrow0$$$$0\rightarrow1$$$$1\rightarrow0$$

Therefore:$$Q_0^+=\overline{Q_0}$$

The lower bit toggles every clock cycle.

The higher bit toggles according to:$$Q_1^+=Q_1\oplus Q_0$$

This produces the required binary counting sequence.

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13. State Assignment

A real circuit cannot directly implement abstract names such as:

IDLE
WAIT
RUN
STOP

These states must be represented using binary values.

This process is called state assignment.

For example:

State	Binary Assignment
IDLE	00
WAIT	01
RUN	10
STOP	11

The chosen binary encoding affects the resulting logic complexity.

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14. Number of Flip-Flops Required

If a sequential system contains $N$ states, the number of binary storage elements required is:$$\boxed{n=\lceil\log_2N\rceil}$$

For example, a system with six states requires:$$n=\lceil\log_2 6\rceil$$

Since:$$2^2=4<6$$

and:$$2^3=8\geq6$$

we need:$$\boxed{3\text{ flip-flops}}$$

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15. State Reduction

Sometimes a state diagram contains states that produce identical behavior and can therefore be combined.

This process is called state reduction or state minimization.

The purpose is to reduce:

• the number of states,
• the number of flip-flops,
• and potentially the amount of combinational logic.

Fewer states can lead to a simpler implementation.

However, the reduction must preserve the external behavior of the original system.

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16. Moore Machine

A Moore machine is a finite-state machine in which the output depends only on the present state.

Therefore:$$\boxed{Y=G(Q)}$$

The input does not directly determine the output.

Conceptually:

Input ─────► Next-State Logic ─────► Flip-Flops
                                      │
                                      ▼
                                    State
                                      │
                                      ▼
                                 Output Logic
                                      │
                                      ▼
                                    Output

The output is associated with the state.

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17. Moore State Representation

A Moore state is commonly represented as:$$\boxed{\text{State / Output}}$$

For example:

┌─────────┐
│ S0 / 0  │
└─────────┘

means that whenever the machine is in state $S0$:$$Y=0$$

The output changes when the machine changes state.

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18. Mealy Machine

A Mealy machine is different.

Its output depends on:

• present state, and
• present input.

Therefore:$$\boxed{Y=G(Q,X)}$$

A conceptual structure is:

                 ┌───────────────┐
Input ──────────►│ Output Logic  │────► Output
       │         └───────────────┘
       │
       ▼
 Next-State Logic ───► Flip-Flops
                            │
                            ▼
                         State

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19. Moore vs Mealy

Feature	Moore	Mealy
Output depends on	State	State + Input
Output equation	$Y=G(Q)$	$Y=G(Q,X)$
Output associated with	States	Transitions
Response to input	Usually state-change dependent	Can respond within current state
Typical design	More state-oriented	Often fewer states

Neither model is universally “better.” The appropriate choice depends on the required behavior, timing, and implementation.

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20. State Diagram Notation

For a Moore machine, states commonly contain the output:

┌─────────┐
│ S0 / 0  │
└─────────┘

For a Mealy machine, transitions commonly contain:

input / output

For example:

S0 ─── 1/0 ───► S1

meaning:$$X=1\rightarrow Y=0$$

while transitioning from $S0$ to $S1$.

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21. Sequential Circuit Design Procedure

A systematic design procedure is extremely useful.

Step 1 — Understand the specification

Determine:

• Inputs
• Outputs
• Required sequence
• Reset behavior
• Clock behavior

Step 2 — Identify the states

Determine what information the system needs to remember.

Step 3 — Draw the state diagram

Represent each state and transition.

Step 4 — Create the state table

List:$$\text{Present State} \rightarrow \text{Input} \rightarrow \text{Next State} \rightarrow \text{Output}$$

Step 5 — Assign binary values

Encode each state.

Step 6 — Select flip-flops

Choose D, JK, T, or another appropriate storage element.

Step 7 — Derive excitation equations

Determine the required flip-flop inputs.

Step 8 — Simplify the logic

Use Boolean algebra or Karnaugh maps.

Step 9 — Implement the circuit

Connect the combinational logic and flip-flops.

Step 10 — Verify every state

Check both valid and unused states.

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22. Example: Simple Two-State Controller

Consider a system with two states:$$S_0$$

and:$$S_1$$

Suppose an input $X$ determines whether the system changes state.

The required behavior is:$$S_0,\ X=0\rightarrow S_0$$$$S_0,\ X=1\rightarrow S_1$$$$S_1,\ X=0\rightarrow S_0$$$$S_1,\ X=1\rightarrow S_1$$

Assign:$$S_0=0$$$$S_1=1$$

The state table becomes:

Present State $Q$	X	Next State $Q^+$
0	0	0
0	1	1
1	0	0
1	1	1

From the table:$$Q^+=X$$

Therefore, using a D flip-flop:$$\boxed{D=X}$$

This is a simple example of how a behavioral specification becomes hardware logic.

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23. Using D Flip-Flops in Sequential Design

D flip-flops are particularly convenient because:$$\boxed{D=Q^+}$$

For every state bit:$$D_0=Q_0^+$$$$D_1=Q_1^+$$$$D_2=Q_2^+$$

and so on.

Therefore, once the next-state equations have been derived, they can be connected directly to the D inputs.

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24. Using JK Flip-Flops

For a JK flip-flop:

Q	$Q^+$	J	K
0	0	0	X
0	1	1	X
1	0	X	1
1	1	X	0

The excitation table is used to determine the required $J$ and $K$ inputs for each state transition.

This is particularly useful in counter and control-circuit design.

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25. Using T Flip-Flops

For a T flip-flop:$$\boxed{T=Q\oplus Q^+}$$

This provides a direct method of determining the required toggle input.

If:$$Q=Q^+$$

then:$$T=0$$

The flip-flop holds its state.

If:$$Q\neq Q^+$$

then:$$T=1$$

The flip-flop toggles.

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26. Karnaugh Maps in Sequential Design

After constructing the state table, the required flip-flop inputs can be simplified using Karnaugh maps (K-maps).

For example, if the circuit has:$$Q_1,\ Q_0,\ X$$

then the next-state equation can be expressed as:$$Q_1^+=F(Q_1,Q_0,X)$$

A K-map can then be used to minimize the Boolean expression.

This can reduce:

• gate count,
• propagation delay,
• hardware complexity.

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27. Unused States

If a circuit has:$$n$$

flip-flops, it can represent:$$2^n$$

states.

But the design may require fewer than that.

For example, six states require three flip-flops:$$2^3=8$$

Therefore two states are unused.

A professional design should determine what happens if the circuit accidentally enters an unused state.

Possible strategies include:

• directing unused states to a valid state,
• using don’t-care conditions when appropriate,
• designing a self-correcting state machine.

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28. Reset State

Most practical sequential circuits require a known starting state.

Suppose the system must begin in:$$S_0$$

The reset mechanism should force the corresponding flip-flop values.

For example, if:$$S_0=00$$

then reset should establish:$$Q_1=0$$

and:$$Q_0=0$$

This prevents unpredictable startup behavior.

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29. Synchronous vs Asynchronous Reset

A reset can generally be implemented as either synchronous or asynchronous.

Synchronous Reset

The reset is recognized in relation to the active clock edge.

Asynchronous Reset

The reset can change the flip-flop state independently of the clock.

The choice depends on the architecture and timing requirements.

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30. Timing in Sequential Circuits

A sequential circuit must satisfy timing constraints.

For a typical synchronous path:$$\boxed{ T_{CLK} \geq t_{CQ} + t_{logic} + t_{setup} }$$

where:

• $t_{CQ}$ = clock-to-Q delay
• $t_{logic}$ = combinational logic delay
• $t_{setup}$ = setup time

Real designs also account for:

• hold time,
• clock skew,
• clock jitter,
• routing delay,
• timing margins.

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31. Why the Clock Matters

The clock establishes when the state is updated.

Suppose the state currently is:$$Q=01$$

The next-state logic may calculate:$$Q^+=10$$

But the flip-flops do not normally store that new state continuously.

At the appropriate clock edge:$$01\rightarrow10$$

The clock therefore provides synchronization across the sequential system.

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32. State Machine Example: Sequence Detection

One important application of sequential-circuit design is sequence detection.

Suppose a digital system must detect:$$101$$

in a serial input stream.

The circuit needs to remember how much of the desired pattern has already been observed.

For example:

No match
   ↓
Received 1
   ↓
Received 10
   ↓
Received 101
   ↓
Detected

The memory required to track these conditions is implemented using flip-flops.

This is a classic application of finite-state-machine design.

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33. Why State Machines Are Important

Finite-state machines are used throughout digital systems.

Examples include:

• Traffic-light controllers
• Vending machines
• Elevator controllers
• Communication protocols
• CPU control units
• Serial-data detectors
• Washing-machine controllers
• Embedded-system control logic

Whenever a system must respond differently depending on what happened previously, a state machine is a natural solution.

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34. State Machine as a Digital Decision System

A useful mental model is:$$\boxed{ \text{Input} + \text{Previous State} \rightarrow \text{Decision} \rightarrow \text{Next State} }$$

This is what separates a state machine from a simple combinational circuit.

The circuit has a history.

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35. Design Verification

After designing the logic, do not stop at obtaining Boolean equations.

Verify:

Every intended state

Check every valid state transition.

Every input combination

Ensure the system responds correctly to all relevant inputs.

Reset behavior

Confirm that the machine reaches its intended initial state.

Unused states

Determine whether the system can recover safely.

Timing

Verify that setup, hold, clock-to-Q and combinational delays meet the required constraints.

This verification step is essential in practical digital design.

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36. Common Mistakes

Mistake 1 — Confusing present state with next state

The present state is what is currently stored.

The next state is what will be stored after the appropriate clock event.

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Mistake 2 — Forgetting the input in a Mealy machine

For a Mealy machine:$$\boxed{Y=G(Q,X)}$$

not simply:$$Y=G(Q)$$

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Mistake 3 — Treating every state as a separate flip-flop

States are encoded using binary state variables.

For $N$ states, binary encoding generally requires:$$\boxed{\lceil\log_2N\rceil}$$

flip-flops.

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Mistake 4 — Ignoring unused states

Unused states must be considered during robust sequential-circuit design.

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Mistake 5 — Designing the logic before defining the behavior

A professional design normally starts with the required behavior:$$\boxed{ \text{Specification} \rightarrow \text{States} \rightarrow \text{State Table} \rightarrow \text{Equations} \rightarrow \text{Circuit} }$$

not the other way around.

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37. Complete Sequential Design Workflow

The complete process can be summarized as:

SYSTEM REQUIREMENT
        ↓
IDENTIFY INPUTS & OUTPUTS
        ↓
DEFINE STATES
        ↓
STATE DIAGRAM
        ↓
STATE TABLE
        ↓
STATE ASSIGNMENT
        ↓
SELECT FLIP-FLOPS
        ↓
EXCITATION TABLE
        ↓
BOOLEAN EQUATIONS
        ↓
K-MAP / LOGIC SIMPLIFICATION
        ↓
CIRCUIT IMPLEMENTATION
        ↓
TIMING ANALYSIS
        ↓
VERIFICATION

This workflow is one of the most important design processes in sequential digital electronics.

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38. Key Equations

General Next-State Equation

$$\boxed{Q^+=F(Q,X)}$$

Moore Output

$$\boxed{Y=G(Q)}$$

Mealy Output

$$\boxed{Y=G(Q,X)}$$

Number of States

$$\boxed{N=2^n}$$

Required Flip-Flops

$$\boxed{n=\lceil\log_2N\rceil}$$

D Flip-Flop

$$\boxed{D=Q^+}$$

T Flip-Flop

$$\boxed{T=Q\oplus Q^+}$$

JK Flip-Flop

$$\boxed{Q^+=J\overline Q+\overline KQ}$$

Typical Synchronous Timing Constraint

$$\boxed{ T_{CLK}\geq t_{CQ}+t_{logic}+t_{setup} }$$

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39. Quick Revision

Before moving forward, make sure you can answer these questions:

What is a sequential circuit?

A circuit whose behavior depends on present inputs and stored state.

What is a state?

The information currently stored by the sequential system.

What is a state table?

A tabular representation of present state, inputs, next state and outputs.

What is a state diagram?

A graphical representation of states and transitions.

What is state assignment?

Assigning binary codes to the abstract states.

What is a Moore machine?

A machine whose output depends only on its present state.

What is a Mealy machine?

A machine whose output depends on present state and input.

How many flip-flops are needed for NN states?$$\boxed{\lceil\log_2N\rceil}$$

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Conclusion

Sequential-circuit design is where digital electronics moves from individual logic components to systems that can remember, react, and control operations over time.

The key concept is the relationship:$$\boxed{ \text{Present State + Input} \rightarrow \text{Next State} }$$

Flip-flops provide the memory, combinational logic determines the next state, and the clock coordinates state transitions.

Once you understand how to move from a specification → state diagram → state table → state equations → flip-flop implementation, you have the fundamental methodology needed to design practical digital controllers.

The next step is to go deeper into Finite State Machines (FSMs), where these concepts are applied to Moore and Mealy machines, sequence detectors, state minimization, overlapping/non-overlapping sequences, and real control-system examples.