A collection of engineering projects, digital products, experiments and creative work — from RTL and hardware systems to software, brands and digital experiences.
I learn by building, breaking, debugging and improving.
A hands-on exploration of digital hardware design using Verilog, simulation and synthesis — focused on understanding how RTL descriptions are transformed into hardware implementations.
Behavioral Verilog description mapping components & control logic.
02. FUNCTIONAL SIMULATION
Verification of module logic functionality with precise testbenches.
03. LOGIC SYNTHESIS
Translating behavioral AST definitions to gate netlists via Yosys.
04. GATE-LEVEL IMPLEMENTATION
Target-mapped hardware netlists ready for fabrication layout.
01 / PORTFOLIO INDEX
ENGINEERING & DESIGN WORKS
A precision portfolio showcasing deep-tech systems engineering, modern RTL logic exploration, custom physical computing layouts, and high-impact digital products.
PROJECT 02 // EMBEDDED
EMBEDDED & IoT SYSTEMS
Building connected hardware systems using microcontrollers, sensors and communication interfaces.